The CD74HC390 and ’HCT390 dual 4-bit decade ripple counters are high-speed silicon-gate CMOS devices and are pin compatible with low-power Schottky TTL (LSTTL). These devices are divided into four separately clocked sections. The counters have two divide-by-2 sections and two divide-by-5 sections. These sections are normally used in a BCD decade or bi quinary configuration, since they share a common master reset (nMR). If the two master reset inputs (1MR and 2MR) are used to simultaneously clear all 8 bits of the counter, a number of counting configurations are possible within one package. The separate clock inputs (nCP0\ and nCP1\) of each section allow ripple counter or frequency division applications of divide-by-2, 4. 5, 10, 20, 25, 50 or 100. Each section is triggered by the High-to-Low transition of the input pulses (nCP0\ and nCP1\).
For BCD decade operation, the nQ0 output is connected to the nCP1\ input of the divide-by-5 section. For bi-quinary decade operation, the nO3 output is connected to the nCP0\ input and nQ0 becomes the decade output.
The master reset inputs (1MR and 2MR) are active-High asynchronous inputs to each decade counter which operates on the portion of the counter identified by the "1" and "2" prefixes in the pin configuration. A High level on the nMR input overrides the clock and sets the four outputs Low. More information: Weight & dimensions | Width | 19.69 mm |  | Depth | 6.6 mm | | Height | 4.57 mm | | Width (with pins) | 19.69 mm | | Depth (with pins) | 10.92 mm | | Height (with pins) | 8.26 mm | | Package depth | 506 mm | | Package width | 13.97 mm | | Package height | 11.23 mm | Features | Type | Logic IC | | Storage temperature (T-T) | -65 - 150 °C | | Number of pins | 16 | | Operating temperature (T-T) | -55 - 125 °C |
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