Memory protection unit (MPU), high-speed embedded memories (up to 64 Kbytes of Flash program memory and 8 Kbytes of SRAM), DMA and an extensive range of system functions, enhanced I/Os and peripherals. The devices offer standard communication interfaces (two I2Cs, two SPIs / one I2S, and two USARTs), one 12-bit ADC (2.5 MSps) with up to 19 channels, an internal voltage reference buffer, a low-power RTC, an advanced control PWM timer running at up to double the CPU frequency, four general-purpose 16-bit timers, a 32-bit general-purpose timer, two low-power 16-bit timers, two watchdog timers, and a SysTick timer. The devices embed AES hardware accelerator and true random number generator (RNG). They can operate with supply voltages from 1.7 V to 3.6 V. Optimized dynamic consumption combined with a comprehensive set of power-saving modes, low-power timers and low-power UART, allows the design of low-power applications. VBAT direct battery input allows keeping RTC and backup registers powered. More information:  | | Family Name: | STM32G0 | Package Type: | SOIC | Mounting Type: | Surface Mount | Pin Count: | 8 | Device Core: | ARM Cortex M0+ | Data Bus Width: | 32bit | Program Memory Size: | 32 kB | Maximum Frequency: | 64MHz | RAM Size: | 8 kB | Number of SPI Channels: | 2 | Number of I2C Channels: | 2 | Number of UART Channels: | 1 | Number of USART Channels: | 2 | Typical Operating Supply Voltage: | 1.7 → 3.6 V | ADCs: | 8 x 12 bit |
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