PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4200_BL product family, based on this platform, is a combination of a microcontroller with an integrated Bluetooth Low Energy (BLE), also known as Bluetooth Smart, radio and subsystem (BLESS).Four opamps with reconfigurable high-drive external and high-bandwidth internal drive, Comparator modes, and ADC input buffering capability Can operate in Deep Sleep mode. Four programmable logic blocks called universal digital blocks, (UDBs), each with eight macrocells and data path Cypress-provided peripheral component library, user-defined state machines, and Verilog input Power Management: Active mode: 1.7 mA at 3-MHz flash program execution Deep Sleep mode: 1.5 μA with watch crystal oscillator More information:  | | Family Name: | CY8C4100 | Package Type: | TQFP | Mounting Type: | Surface Mount | Pin Count: | 64 | Device Core: | ARM Cortex M0 | Data Bus Width: | 32bit | Program Memory Size: | 128 kB | Maximum Frequency: | 24MHz | RAM Size: | 16 kB | USB Channels: | 0 | Number of PWM Units: | 1 x 16 bit | Number of SPI Channels: | 5 | Number of CAN Channels: | 1 | Number of I2C Channels: | 5 | Number of UART Channels: | 5 |
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